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AWC6325 help3e tm dual-band cellular & pcs cdma 3.4 v linear power amplifer module preliminary data sheet - rev 1.3 features ? ingap hbt technology ? high effciency: ? 37 % @ p out = +28 dbm ? 20 % @ p out = +16 dbm ? 10 % @ p out = +10 dbm ? low quiescent current: 4 ma ? internal voltage regulation ? built-in directional coupler ? common v mode control line ? suitable for smps and average power tracking systems with variable supply voltages ? apt can reduce ts.09 average power consumption more than 25% ? reduced external component count ? thin package: 0.9 mm ? rohs compliant package, 260 o c msl-3 applications ? dual-band wireless handsets and data devices for cdma/evdo networks: ? cellular bc 0 and 10 ? pcs bc 1 and 14 product description AWC6325 addresses the demand for increased integration in dual-band handsets for cdma networks. the small footprint 3 mm x 5 mm x 0.9 mm surface mount rohs compliant package contains independent rf pa paths to ensure optimal performance in both frequency bands in less board area than two single band pas. the package pinout was chosen to enable handset manufacturers to independently provide bias to both power amplifers and simplify control with common mode pins. the AWC6325 is part of anadigics 3rd generation of high-effciency-at- low-power (help3e?) family of power amplifers, which deliver low quiescent currents and signifcantly greater effciency through selectable bias modes for high, medium and low power operation. the AWC6325 is designed for use both with and without average power tracking (apt). apt can be used to optimize the vcc level for the desired output power level and linearity, which greatly reduces the total current drawn from the battery. this feature, in conjunction with selectable operating modes, enables signifcant improvements in overall power added effciency of the AWC6325 across the entire dynamic range of operating powers. apt requires use of an external variable voltage supply (dc-dc converter), which is used to provide the variable voltage to vcc pad of the amplifer. a low-leakage shutdown mode increases standby time. this pa has built-in directional couplers for each band, with a common coupler output port cpl_out. the 3 mm x 5 mm x 0.9 mm surface mount package incorporates matching networks optimized for output power, effciency and linearity in a 50 system. the device is manufactured on an advanced ingap hbt mmic technology offering state-of-the-art reliability, temperature stability, and ruggedness. figure 1: block diagram v en_cell v batt rf in_cell rf out_cell v cc a v mode1 1 13 11 14 12 3 4 2 gnd v cc 5 6 10 9 bias control voltage regulation cpl out rf out_pcs v en_pcs rf in_pcs gnd at slug (pad) 8 7 v mode2 gnd bias control voltage regulation cpl cpl 05/2012
2 table 1: pin description figure 2: pinout v mode1 v mode2 cpl out pin name description 1 v en_cell enable voltage for cell band 2 rf in_cell rf input for cell band 3 v mode1 mode control voltage 1 4 v batt battery voltage 5 v mode2 mode control voltage 2 6 rf in_pcs rf input for pcs band 7 v en_pcs enable voltage for pcs band 8 rf out_pcs rf output for pcs band 9 gnd ground 10 cpl out coupler output port 11 v cc a supply voltage a 12 v cc supply voltage 13 rf out_cell rf output for cell band 14 gnd ground preliminary data sheet - rev 1.3 05/2012 AWC6325
3 electrical characteristics table 2: absolute minimum and maximum ratings stresses in excess of the absolute ratings may cause permanent damage. functional operation is not implied under these conditions. exposure to absolute ratings for extended periods of time may adversely affect reliability. table 3: operating ranges the device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defned in the electrical specifcations. notes: (1) for operation at v cc = +3.2 v, p out is derated by 0.5 db. parameter min max unit 6xssorowdh 77 cc cc a) 0 v 0h&uoodh 02( v en ) 0 v )s3hu3 1 ) - +10 %p 6udh7hpshuduh7 67 ) -40 c parameter min typ max units comments 2shudwluhtxhfi 814 - - 0+ &hooodu%& 3&6%& 6ssoodh cc cc a ) +0.8 +3.4 v %dhuodh %77 ) +3.2 +3.4 v (deohodh en_cell ven_pcs ) 0 +1.8 0 +3.1 v pa on 3v 0h&uoodh 02( ) 0 +1.8 0 +3.1 v l+l l &hooodu)2s3hu&0 &0+30 &0030 &030 (1) - - 28.0 16.0 10.0 - - - %p &0& 3&6)2s3hu&0 &0+30 &0030 &030 (1) - - 28.0 16.0 10.0 - - - %p &0& &dvh7hpshuduh7 c ) -30 - c preliminary data sheet - rev 1.3 05/2012 AWC6325
4 table 4: electrical specifcations - cellular band (bc 0, 10) (t c = +25 c, v batt = v cc = +3.4 v, v en_cell = +1.8 v, 50 ? system, cdma2000 rc-1 waveform) notes: (1) pae and acp measured at 836.5 mhz. parameter min typ max unit comments p out v mode1 v mode2 dl 14 7 28 17 12 31 14 % %p %p %p 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v mdh&dho3hu dn+vh (1) 3ulpdu&dho% 0+ mdh&dho% n+ - - - % %p %p %p 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v mdh&dho3hu d0+vh (1) 3ulpdu&dho% 0+ mdh&dho% n+ - - - -68 % %p %p %p 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v 3huh(lh (1) - - - 10 - - - % %p %p %p 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v 4lhvh&uuht - 4 - ma u cc slv 02( = +1.8 v 0h&uo&uuh - - ma u mode sl 02( = +1.8 v %77&uuh - - ma u %77 pin 02( = +1.8v (deoh&uuh - 0.3 - ma u en_cell sl 02( = +1.8 v 7dohhu&uuh v %77 l6ph - 7 - a v %77 cc v en_cell 02( = 0 v +%7hdndh&uuh cc ) 6ph - <1 - ma v %77 cc v en_cell 02( = 0 v 1lvhhhlh%d - -133 - %p+ 0+0+ +duplv o o o - - - - % p out <%p spshhh - - 6 &sol)du - 22 - % 6sulv2shho doovsulvsv - - % p out <%p edod6 2edod6 ssolhvhudooshudlllv dplvpdvuhvvl shupdhhuddludlouh - - 6 ssolhvhuooshudludh preliminary data sheet - rev 1.3 05/2012 AWC6325
5 table 5: electrical specifcations - pcs band (bc 1, 14) (t c = +25 c, v batt = v cc = +3.4 v, v en_pcs = +1.8 v, 50 system, cdma2000 rc-1 waveform) notes: (1) acprs and effciency measured at 1880 mhz. parameter min typ max unit comments p out v mode1 v mode2 gain 24 10 7 26.5 13 9 30 16 12 db +28 dbm +16 dbm +10 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v adjacent channel power at 1.25 mhz offset (1) primary channel bw = 1.23 mhz adjacent channel bw = 30 khz - - - -48 -52.5 -53 -46.5 -46.5 -46.5 dbc +28 dbm +16 dbm +10 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v adjacent channel power at 1.98 mhz offset (1) primary channel bw = 1.23 mhz adjacent channel bw = 30 khz - - - -55 -60 -63 -54 -54 -54 dbc +28 dbm +16 dbm +10 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v adjacent channel power at 2.25 mhz offset (1) primary channel bw = 1.23 mhz adjacent channel bw = 30 khz - - - -59.5 -63.5 -67.5 -56.5 -57 -57 dbc +28 dbm +16 dbm +10 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v power-added effciency (1) - - - 37 20 10 - - - % +28 dbm +16 dbm +10 dbm 0 v 1.8 v 1.8 v 0 v 0 v 1.8 v quiescent current (icq) - 4 - ma through v cc pins, v mode1,2 = +1.8 v mode control current - 0.5 - ma through v mode pin, v mode1,2 = +1.8 v batt current - 1.5 - ma through v batt pin , v mode1,2 = +1.8v enable current - 0.3 - ma through v en_pcs pin, v mode1,2 = +1.8 v total decoder current on v batt (in shutdown mode) - 7 - a v batt = +4.35 v, v cc = +4.35 v, v en_cell = 0 v, v mode1,2 = 0 v hbt leakage current on v cc (in shutdown mode) - <1 - a v batt = +4.35 v, v cc = +4.35 v, v en_cell = 0 v, v mode1,2 = 0 v noise in receive band - -133 - dbm/hz 1930 mhz to 1990 mhz harmonics 2f o 3f o , 4f o - - - - -30 -30 dbc p out < +28 dbm input impedence - - 2:1 vswr coupling factor - 22 - db spurious output level (all spurious outputs) - - -65 dbc p out < +28 dbm in-band load vswr < 5:1 out-of-band load vswr < 10:1 applies over all operating conditions load mismatch stress with no permanent degradation or failure 8:1 - - vswr applies over full operating range preliminary data sheet - rev 1.3 05/2012 AWC6325
6 application information to ensure proper performance, refer to all related application notes on the anadigics web site: http://www.anadigics.com shutdown mode the power amplifer may be placed in a shutdown mode by applying logic low levels (see operating ranges table) to the v enable and v mode pads. table 6: bias control bias modes the power amplifer may be placed in low, medium, or high bias modes by applying the appropriate logic level (see operating ranges table) to the v mode pin. the bias control table lists the recommended modes of operation for various applications. application p out levels bias mode v en_cell v en_pcs v mode1 v mode2 v cc v batt low bias mode < +10 dbm low +1.8 v +1.8 v +1.8 v 0.8 - 4.35 v > 3.2 v medium bias mode > +10 dbm < +16 dbm medium +1.8 v +1.8 v 0 v 0.8 - 4.35 v > 3.2 v high bias mode > +16 dbm high +1.8 v 0 v 0 v 1.3 - 4.35 v > 3.2 v shutdown - shutdown 0 v 0 v 0 v 3.2 - 4.35 v >3.2 v figure 3: recommended on/off timing sequence notes: (1) level might be changed after rf is on. (2) rf off defned as p in -30 dbm. (3) switching simultaneously between v mode and v en is not recommended. v en_cell,pcs v cc, v cc a note 1 rf in_cell,pcs notes 1,2 off sequence referenced after 90 % of rise time referenced before 10 % of fall time on sequence on sequence start t_ 0n = 0 t_ 0n +1 s t_ 0n +3 s off sequence start t_ 0f f = 0 t_ 0f f+ 2 st _0 ff +3 s vcontrols venable/vmode(s ) rise/fall max 1 s defined at 10% to 90% of min/max voltage preliminary data sheet - rev 1.3 05/2012 AWC6325
7 figure 4: application circuit 1 13 11 14 12 3 4 2 5 6 10 9 bias control voltage regulation cpl out gnd at slug (pad) 8 7 bias control voltage regulation cpl cpl rf in_cell rf in_pcs v mode1 v batt v en_cell v en_pcs 2.2 f v mode2 68pf v cc 1000 pf 2.2 f rf out_cell rf out_pcs 68 pf v cc a preliminary data sheet - rev 1.3 05/2012 AWC6325
8 package outline figure 5: package outline - 14 pin 3 mm x 5 mm x 0.9 mm surface mount module figure 6: branding specifcation 6325 lllllnn pin 1 identifier c ountr y co de(c c) pa rt number l ot number date co de y y= y ear ww= wo rk w eek yy wwc c preliminary data sheet - rev 1.3 05/2012 AWC6325
9 figure 7: pcb board design guidelines pcb board design guidelines refer to figure 7 for the recommended pcb metal design, soldermask design, and stencil print patterns when assembling with anadigics modules. it is important to note that the pcb metal design is dependent upon several factors: the electrical and thermal performance requirements of the product, and the pcb-to-device interconnect pattern. the pcb metal design recommendations primarily deal with the pcb-to-device interconnection. specifc board-level electrical and thermal performance re - quirements will be dictated by the physical geometry of the specifc application and are the responsibility of the end product manufacturer. preliminary data sheet - rev 1.3 05/2012 AWC6325
10 figure 8: carrier tape drawing figure 9: reel drawing dimensioning and tolerancing per asme y14.5m-1994 made in us a notes: 1. surface resistivity: material: black carbon polystyrene 1x10 to 1x10 ohms/squar e 4 1 00% f u l l 7 5 % 50 % 25 % 5 (2x)slot 3.0.1 (3x)1.78.25 ?20.60.13 ?13.00. 2 12.4. ?177.8 min . ?54.2 0.1 ?50.8 0.2 center hole detai l enlarged for clarit y dimensions are in millimeters preliminary data sheet - rev 1.3 05/2012 AWC6325
11 ordering information order number temperature range package description component packaging AWC6325q7 -30 ?c to +90 ?c rohs compliant 14 pin 3 mm x 5 mm x 0.9 mm surface mount module tape and reel, 2500 pieces per reel AWC6325p9 -30 ?c to +90 ?c rohs compliant 14 pin 3 mm x 5 mm x 0.9 mm surface mount module partial tape and reel warning anadigics products are not intended for use in life support appliances, devices or systems. use of an anadigics product in any such application without written consent is prohibited. import ant notice anadigics, inc. 141 mount bethel road warren, new jersey 07059, u.s.a. tel: +1 (908) 668-5000 fax: +1 (908) 668-5132 url: http://www.anadigics.com anadigics, inc. reserves the right to make changes to its products or to discontinue any product at any time without notice. the product specifcations contained in advanced product information sheets and preliminary data sheets are subject to change prior to a products formal introduction. information in data sheets have been carefully checked and are assumed to be reliable; however, anadigics assumes no responsibilities for inaccuracies. anadigics strongly urges customers to verify that the information they are using is current before placing orders. preliminary data sheet - rev 1.3 05/2012 AWC6325

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